Current Projects:

ARM Processor Synthetic Benchmark Development Project

(IDEAL Research Lab, University of Florida. Faculty Advisor- Dr. Tao Li)

Part One: Simpoint Verification in ARMv8 Board and LiveSP Testing

• Cross compiled spec2006 to ARMv8 board and collect statistics by means of perf tool

• Used valgrind to generate BBV for each benchmark in ARMv8 board and obtain simpoints using SimPoint tool in host

• Compared the results between Simpoint and full system run to test the validity of simpoint in ARM

FPGA Implementation of 1-D Time Domain Convolution  

(University of Florida. Faculty Advisor - Prof. Greg. Stitt)                                                        

• Implemented convolution logic on FPGA board using VHDL, which exploits a significant amount of parallelism to provide better performance than microprocessor

6T SRAM Cell Design          

(University of Florida. Faculty Advisor - Prof. William Eisenstadt)                     

• Designed a 4x1 SRAM consisting of a basic 6T cell using Cadence, ensuring stability of performance parameters like hold, read and write determining speed and power dissipation

Past Projects:

Design and implementation of Virtual Reconfigurable Circuits(VRC) for fault tolerant systems

(JIIT, Noida. Faculty Advisor- Mr. Atul Kr. Srivastava)

This project presents a new approach to on-line fault tolerance via reconfiguration of the Programmable Elements (PE) mapped onto field programmable gate arrays (FPGAs).

Applications of MFCC and Vector Quantization in Speaker Recognition

(JIIT,Noida. Faculty Advisor - Dr. Jawaid Alam)

In this project,we concentrate on optimizing Mel Frequency Cepstral Coefficient(MFCC) for feature extraction and Vector Quantization(VQ) for feature modelling. We find, that this approach yields significant performance when the changes are made in the number of mfcc‟s and the codebook size. Recognition rate is found to reach upto 89% and the distortion reduced upto 71 percent which was better than previous attempts.

FPGA implementation of Traffic Light Controller – 4 way based on timing control

(Cetpa InfoTECH Pvt. Ltd.)

This project simulated the Real-time traffic light controller coded in VHDL. Concepts of clock division were applied. It was tested succesfully on FPGA.

Design of Printed Circuit Board (PCB)

(Creativity and Innovation Cell in Electronics, JIIT Noida)

First hand on experience of fabrication process. In this project, our aim was to design a working PCB of a color sensor. Circuit designing done using Capture CIS. Generated netlist for PCB package. Import Netlist to into PCB package , place components ,route signals and finally generated Gerber file for PCB plant.