module processor ( clk, clk_ana, rst, th_mux, din_mux, din_bypass, adc_in, 
        adc_sample, threshold_in, neuron_ID, detected_pulse, dist_ready, 
        sorted, threshold_adaptive, data_sout, spike_wen, spike_addr, 
        detected_pulse_64, accuracy, th_adjust, adder_out, feedback_en, 
        feedback, template_out1, template_out2, is_template, euclidean_out, 
        compare, age_inc, update, merge, insert, wb_new, wen, ren, wb_addr, 
        cache_out, valid_array, valid, valid_en, valid_addr );
  input [7:0] din_bypass;
  input [3:0] threshold_in;
  output [3:0] neuron_ID;
  output [7:0] threshold_adaptive;
  output [7:0] data_sout;
  output [5:0] spike_addr;
  output [4:0] accuracy;
  output [7:0] adder_out;
  output [7:0] template_out1;
  output [7:0] template_out2;
  output [7:0] euclidean_out;
  output [39:0] wb_new;
  output [3:0] wb_addr;
  output [39:0] cache_out;
  output [15:0] valid_array;
  output [3:0] valid_addr;
  input clk, clk_ana, rst, th_mux, din_mux, adc_in, adc_sample;
  output detected_pulse, dist_ready, sorted, spike_wen, detected_pulse_64,
         th_adjust, feedback_en, feedback, is_template, compare, age_inc,
         update, merge, insert, wen, ren, valid, valid_en;

  wire   [7:0] din_analog;


  dig_core U1 ( .clk(clk_B), .rst(rst_B), .th_mux(th_mux_B), .din_mux(din_mux_B), 
        .din_bypass(din_bypass_B), .din_analog(din_analog_B), .threshold_in(
        threshold_in_B), .threshold_adaptive(threshold_adaptive), .data_sout(
        data_sout), .spike_wen(spike_wen), .spike_addr(spike_addr), 
        .detected_pulse_64(detected_pulse_64), .accuracy(accuracy), 
        .th_adjust(th_adjust), .adder_out(adder_out), .feedback_en(feedback_en), .feedback(feedback), 
        .template_out1(template_out1), .template_out2(template_out2), 
        .is_template(is_template), .euclidean_out(euclidean_out), .wb_new(
        wb_new), .wen(wen), .ren(ren), .wb_addr(wb_addr), .cache_out(cache_out), .valid_array(valid_array), .valid(valid), .valid_en(valid_en), .valid_addr(
        valid_addr), .detected_pulse(detected_pulse_B), .dist_ready(dist_ready_B), 
        .neuron_ID(neuron_ID_B), .compare(compare), .age_inc(age_inc), .update(
        update), .merge(merge), .insert(insert), .sorted(sorted_B) );
  adc_decoder U2 ( .clk_ana(clk_ana_B), .rst(rst_B), .adc_in(adc_in_B), .adc_sample(
        adc_sample_B), .adc_out(din_analog) );
endmodule