Project Description:
Originally, this project started as a means to breadboard an Altera EPM7128SLC84-15 CPLD. Altera donated 60 CPLD pieces to the UF SAE electrical team. Therefore a means was developed to incorporate these devices into prototypes.
RE:Vision 1
[left] Top View [right] Bottom View
All I/O pins were surfaced and attached to headers 1800 mils apart for easy breadboard insertion. A JTAG programming header was also included. The CPLD received power from the breadboard. Version 1 was prototyped on a T-Tech PCB rapid prototype machine.
RE:Vision 2
Version 2 added a 44 pin PLCC socket for smaller CPLD devices. Also, on board power regulation and a 2.5mm dc power jack were added. Only one device could exist in a socket at a time. Breakout capability was lost.
RE:Vision 3
Version 3 adds socket selectability, on board JTAG, on board parallel port ByteBlaster, selectable self or host circuit power supply, and breakout capablity for both CPLD's. Both devices can be operated simultaneously. Power selection is via a jumper. Note the corrections to the bottom of the PCB [right]. Two nets were mislabeled and subsequently hand drilled an rerouted with 30 ga. wire.
RE:Vision 4 [future]
A clock circuit will be added to increase functionality and the misrouted nets will be corrected.